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43 lines
1.5 KiB
43 lines
1.5 KiB
/* |
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WARNING: Do NOT edit the input and output ports in this file in a text |
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editor if you plan to continue editing the block that represents it in |
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the Block Editor! File corruption is VERY likely to occur. |
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*/ |
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/* |
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Copyright (C) 1991-2013 Altera Corporation |
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Your use of Altera Corporation's design tools, logic functions |
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and other software and tools, and its AMPP partner logic |
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functions, and any output files from any of the foregoing |
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(including device programming or simulation files), and any |
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associated documentation or information are expressly subject |
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to the terms and conditions of the Altera Program License |
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Subscription Agreement, Altera MegaCore Function License |
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Agreement, or other applicable license agreement, including, |
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without limitation, that your use is for the sole purpose of |
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programming logic devices manufactured by Altera and sold by |
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Altera or its authorized distributors. Please refer to the |
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applicable agreement for further details. |
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*/ |
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(header "symbol" (version "1.1")) |
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(symbol |
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(rect 16 16 160 96) |
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(text "sec_cnt" (rect 5 0 36 12)(font "Arial" )) |
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(text "inst" (rect 8 64 20 76)(font "Arial" )) |
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(port |
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(pt 0 32) |
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(input) |
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(text "clk" (rect 0 0 10 12)(font "Arial" )) |
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(text "clk" (rect 21 27 31 39)(font "Arial" )) |
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(line (pt 0 32)(pt 16 32)(line_width 1)) |
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) |
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(port |
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(pt 144 32) |
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(output) |
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(text "second" (rect 0 0 28 12)(font "Arial" )) |
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(text "second" (rect 95 27 123 39)(font "Arial" )) |
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(line (pt 144 32)(pt 128 32)(line_width 1)) |
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) |
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(drawing |
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(rectangle (rect 16 16 128 64)(line_width 1)) |
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) |
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)
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