mirror of https://github.com/IoTcat/FDC.git
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theme: jekyll-theme-architect |
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# Questions |
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# Third AA Meeting |
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>[x] ---06/13/2020 by Yimian Liu |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE 5 floor AA office |
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|
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## Ques |
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- Ques about the usage of resistance in demo |
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- Ques about the impedance matching |
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- Ques about PCB differentical line design |
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|
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## Techninal Suggestions |
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- Resistance is used to perfect the circuit |
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- impedance match sometimes do not really necessary in this case |
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- just make sure that there are input and output |
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# Third AA Meeting |
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>[x] ---06/20/2020 by Yimian Liu |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE 5 floor AA office |
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|
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## Ques |
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- PCB design problems |
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- convert gergle to brp |
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- how to submit PCB design |
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|
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## Techninal Suggestions |
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- Place through hole alone the high frequency line |
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- Use Laying copper to ground most place |
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- Check the minimum width of wire |
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- |
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# Schematic Design CheckList |
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## Schematic Checklist |
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[x] `---31/01/2020 drafted by Yimian Liu` |
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- [] Debat the designed method of EN pin |
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## Task |
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[x] Select IC |
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[x] Impedance Matching |
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[x] Filter Design |
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[x] Differencial Line Design |
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[x] Simulation |
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[x] Output BOM and purchase List |
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# Third Group Meeting |
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>[x] ---14/02/2020 by Yidi Song |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE Building |
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|
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|
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## What have done |
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1. Learn the basic code of LaTeX and how to use the Git control system. |
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2. Learn the PCB wiring and layout, and completed the PCB wiring of the 0.0.1 version of the circuit. |
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3. Redesign schematic. |
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|
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We learned how to use LaTex and wrote a exercise article. Contents, table, picture, reference and equations were all included. The picture of this exercise is shown below. |
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 |
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We learned the basic uses of Git. Continue did the schematic simulation and PCB design. |
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<!DOCTYPE html> |
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<html> |
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<head> |
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<meta charset="utf-8"> |
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<meta http-equiv="X-UA-Compatible" content="IE=edge" /> |
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<meta name="viewport" content="width=device-width, initial-scale=1, maximum-scale=1, user-scalable=0" /> |
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<title>Frequency Downconverter</title> |
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<link rel="stylesheet" href="https://unpkg.com/docute@3/dist/docute.css"> |
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<script type="text/javascript">block_aplayer = true;</script> |
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<script src="https://cdn.yimian.xyz/ushio-js/ushio-head.min.js"></script> |
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</head> |
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<body> |
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<div id="app"></div> |
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<script src="https://unpkg.com/docute@3/dist/docute.js"></script> |
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<script src="https://cdn.yimian.xyz/ushio-js/ushio-footer.min.js"></script> |
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<script> |
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|
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|
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docute.init({ |
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title: 'Frequency Downconverter', |
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repo: 'iotcat/fdc', |
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twitter: 'iotcat', |
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'edit-link': 'https://github.com/IoTcat/fdc/blob/master/docs/', |
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nav: { |
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default: [ |
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{ |
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title: 'Home', path: '/' |
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}, |
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{ |
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title: 'Circuit Design', path: '/part/circuit' |
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}, |
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{ |
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title: 'PCB Design', path: '/part/pcb' |
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}, |
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{ |
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title: 'Test and Result', path: '/part/result' |
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}, |
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{ |
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title: 'Log', type: 'dropdown', items: [ |
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{ |
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title: "Log Book", |
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path: "/log/logbook" |
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}, |
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{ |
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title: "AA Meeting Log", |
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path: "/log/aameeting" |
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}, |
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{ |
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title: "Group Meeting Log", |
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path: "/log/groupmeeting" |
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}, |
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] |
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} |
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] |
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} |
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}) |
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</script> |
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</body> |
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</html> |
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# The first week meeting |
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>[x] `---30/01/2020 by Yimian Liu` |
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>[x] `Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song` |
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>[x] `Location: EE 5 floor AA office` |
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|
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## Outline |
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- Figure out the key **params of FDC** |
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- Think how to **measure** these params |
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- There might be a week to wait for the SMT |
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- In the waiting time, figure out **measure/test procedure and plan** |
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- Always think about the **Report** |
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- Use blog to provide `evidence` of proof |
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- Its better to conduct the proj **document-oriented** with a check list |
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|
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## Technical Suggestions |
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- **Do not** need a bandpass filter at input |
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- **Do not** need a amplifer at input and output |
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- May need a bandpass near output |
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- Think how to design the output impandance to be ***50ohms*** |
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- The output bandpass may use **butterworth** |
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- The gain can be not considered |
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- The input can be designed to be any range between `300M-3GHz`, `1850-1910MHz` is ok |
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|
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------------------------------ |
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|
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|
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# Second AA Meeting |
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>[x] ---06/02/2020 by Yidi Song, Yimian Liu |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE 5 floor AA office |
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|
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## Ques |
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- LT5512 spice models |
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- the size and layers of PCB |
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- Design details about IF LPF |
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- BNC adapter |
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|
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## Techninal Suggestions |
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- Use spice to simulate |
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- Find some similar IC simulation models |
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- Set up the IC by what we want to test |
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- Remove all unnecessary Filter and only leave mixer |
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- Altium Designer is recommanded to use |
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- Contact lab members to find out the port of spectrum analyzer |
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- Buy SMA-BNC adapter if necessary |
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- Components list ASAP, do not suggest to buy by ourselves |
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|
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------------------------------ |
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|
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# Third AA Meeting |
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>[x] ---13/02/2020 by Yimian Liu |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE 5 floor AA office |
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|
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## Ques |
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- Ques about the usage of resistance in demo |
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- Ques about the impedance matching |
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- Ques about PCB differentical line design |
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|
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## Techninal Suggestions |
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- Resistance is used to perfect the circuit |
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- impedance match sometimes do not really necessary in this case |
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- just make sure that there are input and output |
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|
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|
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------------------------------------------------- |
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|
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# Fourth AA Meeting |
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>[x] ---20/02/2020 by Yimian Liu |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE 5 floor AA office |
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|
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## Ques |
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- PCB design problems |
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- convert gergle to brp |
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- how to submit PCB design |
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|
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## Techninal Suggestions |
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- Place through hole alone the high frequency line |
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- Use Laying copper to ground most place |
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- Check the minimum width of wire |
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|
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|
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----------------------------- |
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☛[Go to Group Meeting Log](/log/groupmeeting) |
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## Issues |
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- RF Balun unmatched frequency.. |
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- 2450M or 450M |
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- no 2450M balun 2:1 |
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- to 450M 80M (820M) 370M |
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- Select BALF-SPI2-02D3 on onecall |
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- BALF-SPI2-02D3 output impendance not 50 ohms, droped |
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- to 610M 80M (1140M) 530M |
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- Design IF impedance for 200 ohms |
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- Learn [Smith Chart](https://www.maximintegrated.com/cn/design/technical-documents/tutorials/7/742.html) |
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- Figure out IF Table on Spec is || |
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- to 610M 80M (1300M) 690M |
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- IF 5.6pF 220nH 220nH |
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- new branch v2.0.1 |
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- Figure out component list |
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- Find component provider |
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- Finish component List |
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- new schematic |
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- check bom |
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# The first week meeting |
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[x] `---29/01/2020 by Boyao Yang, Yimian Liu` |
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[x] `Participaants: Boyao Yang, Weizhou Wen, Yimian Liu` |
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[x] `Location: Harold Cohen Library 3A` |
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|
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## Setting goals and weekly prograss |
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- The general goals were discussed. For the first three weeks, the general design should be accomplished. Allow two weeks for surface mounting and PCB fabrication. |
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- Clarify the divison of responsibility. |
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|
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## Install relevant softerware |
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- Software for circuit simulation |
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- Software for PCB design |
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- Implement Git / Nodejs env |
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|
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## Questions (Ask academic advisor) |
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- `not in progress` |
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|
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----------------------------- |
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|
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|
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# The first week meeting |
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[x] `---29/01/2020 by Boyao Yang, Yimian Liu` |
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[x] `Participaants: Boyao Yang, Weizhou Wen, Yimian Liu` |
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[x] `Location: Harold Cohen Library 3A` |
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|
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## Setting goals and weekly prograss |
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- The general goals were discussed. For the first three weeks, the general design should be accomplished. Allow two weeks for surface mounting and PCB fabrication. |
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- Clarify the divison of responsibility. |
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|
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## Install relevant softerware |
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- Software for circuit simulation |
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- Software for PCB design |
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- Implement Git / Nodejs env |
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|
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## Questions (Ask academic advisor) |
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- `not in progress` |
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|
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|
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|
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---------------------------- |
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|
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# Third Group Meeting |
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>[x] ---14/02/2020 by Yidi Song |
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>[x] Participaants: Boyao Yang, Weizhou Wen, Yimian Liu, Yidi Song |
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>[x] Location: EE Building |
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|
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|
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## What have done |
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1. Learn the basic code of LaTeX and how to use the Git control system. |
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2. Learn the PCB wiring and layout, and completed the PCB wiring of the 0.0.1 version of the circuit. |
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3. Redesign schematic. |
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|
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We learned how to use LaTex and wrote a exercise article. Contents, table, picture, reference and equations were all included. The picture of this exercise is shown below. |
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 |
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We learned the basic uses of Git. Continue did the schematic simulation and PCB design. |
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|
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|
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|
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----------------------------- |
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☛[Go back to Home](/) |
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Log Book - Frequency Downconverter Proj |
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> ※ Archieved at 2020-03-04 22:11:13 UTC |
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|
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## Week 0 |
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- Investigate background info |
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- Select IC |
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- Give out first component purchase list |
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|
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## Week 1 |
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- learn how to use Altium Designer |
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- Learn filter design |
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- Learn LT5512 data sheet |
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- Determine working frequenct at 1.9GHz-170MHz |
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- Clarify the division of responsibility |
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- Decide to choose Butterworth Filter |
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## Week 2 |
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- Build schematic library |
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- Build PCB library |
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- Build missing PCB footprint |
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- Begin to think about impedance match |
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- Determined the circuit diagram except the part of IF BPF (Schematic v0.0.1) |
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|
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## Week 3 |
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- Learn how to design PCB |
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- Design impedance matching |
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- Put forward schematic v1.0.0 |
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- Redesign circuit bacause of one mistake about the Balun |
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- Change working frequency from to 610MHz-80MHz |
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- Propose schematic v2.0.1 |
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- Generate second component purchase list |
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- Learn Latex and Git |
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|
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## Week 4 |
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- PCB routing |
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- Ethic and sustainability report |
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- IF part simulation using ADS |
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- Convert PCB proj from Altium to EagleCAD |
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## Week 5 |
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- Output gerber files |
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- Submit PCB Design to workshop |
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- Poster Design |
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## Week 6 |
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- Print out poster |
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- Prepare for presentation |
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- Conclude the project |
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- Classify and publish the blog |
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----------------------------- |
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☛[Go to AA Meeting Log](/log/aameeting) |
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# Schematic Design |
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## General Information |
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 |
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A typical FDC accept two input signal and output the combined signal at f1+f2 and f1-f2. This means that, besides the RF signal input, another low frequency vibration signal, which we called as LO signal, is also needed. In this project, the signal was input and output through BNC jacks. The IC was powered by 5V DC power supplier. |
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## Design Steps |
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Six steps were conducted in the circuit design produrce. The first step is to select a Mixer IC, which should accpet UHF signal and need to be in stock in UK. We selected LT5512 IC which can support up to 3GHz signal in this case. Secondly, impedance matching is processed in order to match standard 50Ω input and 50Ω output. In this case, capacitors and inductors were utilized to design with the help of Smith chart and online design tools. Thirdly, a Low Pass Filter function was considered while design the impedance matching in the IF part. Then, Differcial Line Design was tried to optimized the performance of signal transmission. Additionally, simmulation was conducted with ADS to verify the circuit performance. |
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|
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### Component Selection and Purchase |
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The first produrce of component selection is figure out what we really needed. In this case, a mixer, three BNC jacks and one PCB header are necessary, while others such as transformses, amplifier, filters are optional. After confirm what we needed (the schametic), component selection can be proceeded. During the component selection, it is common and sometimes unavoidly unable to find a expected component. When this happened, a new purchase list in corresponding with a redesign schematic should be proceeded. |
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 |
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|
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### Filter Design |
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In downconverter case, the less the ripples on the bandwidth, the better performance can be expected. After weigth the performance of the filter and the difficulty of the PCB design, we have choosed the one order Butterworth filter as well as designed the schematic to be as few filter as possible. |
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### Impedance Matching |
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Impedance matching is considered so that the circuit can accept a standard 50 ohms input and support a 50 ohms output. This design is conducted in the meantime with the filter design. Online tools from Analog Devices was utilized and Shmith Chart was tried to varified the design. A 50:200 ohms Balun transformer was implemented in the IF part to match the impedance. |
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 |
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This picture shows the result of simulation of frequency response of the IF part. From this firgue, it can be figured out that the f1+f2 frequency, which is about 1.1GHz in this case, can be effectively blocked, while the f1-f2 passing. |
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|
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### Differencial Line Design |
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As the LT5512 request a differencial RF input and IF output, several capacitiors was used to block the DC while a Balun was settled to transform IF signal from differencial to single side. |
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### Simulation |
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ADS was used to check the expected performance of the design of impedance matching circuit. |
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## Experience |
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The design of circuit is not something that can be done by once, instead, rolling of all the steps above is usual. In this case, we have designed more than three versions of the schematic. |
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 |
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This figure shows the v0.0.1 version of the schematic, which works at 1.9GHz-170MHz. However, this did not be used because of a mistake that the Balun transformer we purchase at the first time can not work at 1.9GHz, which we did not realize it when we make the first component list in early January. Due to this small error, we redesign nearly the whole circuit in less than one week and change the working frequency to 610MHz-80MHz, as no substitutable components can be found on RS, Oncall and other supplier. |
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----------------------------- |
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☛[Go to the PCB Part blog](/part/pcb) |
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# PCB Design |
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|
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> Software used: Altium Designer V20.0.1 Eagle CAD |
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> Version control: Git and Github |
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|
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|
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## Components Library |
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Before the PCB design, the component library of the schematic and the component library of the PCB must be created. In order to ensure the accuracy of component package specifications including footprint, most packages in the PCB component library were imported from the supplier's official website. Other components which cannot be found from the official website were import from Github. |
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|
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## PCB structure design and layout |
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Due to the small number of PCB design components and the complexity of the circuit, single-layer boards were selected to simplify design and production. |
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 |
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|
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Because the radio frequency (RF) circuit is a distributed parameter circuit, it is easy to produce a coupling effect in the actual work of the circuit. Therefore, in the actual PCB design, it will be found that the interference radiation in the circuit is difficult to control. |
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For example, problems such as mutual interference between digital circuits and analog circuits, noise interference from power supplies, and interference caused by unreasonable ground lines. |
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In the process of PCB layout, we mainly refer to the data sheet of the integrated circuit and the circuit layout of the schematic. |
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Drawback: Many RF PCB layout rules are ignored during the layout process. |
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e.g. Silk screen design rule in RF PCB design |
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|
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## PCB routing |
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Once the basic placement has been completed, the next stage of the PCB design is to route the connections between all the components. The first routing uses the software's auto-routing function, then repair the wires according to the specific components and circuits. |
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The overall requirements for wiring are: RF signal traces are short and straight, reducing abrupt changes in the line, fewer holes are punched during routing, and they do not intersect with other signal lines. As much as possible, add ground vias around the RF signal lines. |
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After designing the routing, pads, and vias, a DRC (Design Rule Check) should be performed. In the inspection results, the differences between the designed graph and the defined rules are listed in detail, and the networks that do not meet the requirements can be found. |
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|
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## Copper plating |
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The main purpose of copper plating is to improve the anti-interference ability of the circuit. At the same time, it has great benefits for PCB heat dissipation and PCB strength. Copper grounding can also serve as a shield. |
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In high-frequency circuits, a ground (GND) copper isolation shield is required. Therefore, a large area of copper is applied on the bottom layer to connect all ground wires. For the top layer, the circuit requires strict impedance control, and copper plating is likely to affect impedance control due to distributed capacitance. The wiring density around the integrated circuit is high, and the excessive copper separation may affect grounding. |
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|
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----------------------------- |
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☛[Go to the Result Part blog](/part/result) |
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# Result and Testing |
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|
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## Result |
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 |
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This figure shows the front of the manufactured PCB. As it shown, all the SMD components was not solded on the PCB and only the IC and Balun was solded and wires were printed and holes was drilled, since the workshop in university did not do SMT. When we contracted the workshop technicists, they did tell us that they can not do this, however, we did not quitly understand him at that time. |
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 |
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This figure shows the back side of the PCB result. It can be shown that this side was copper plated to eliminate the effect of ground line. |
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## Test Produre |
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|
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### Equipments |
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|
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 |
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|
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The most important (and the most expensive) equipment is the spectrum analyzer, which was shown in the above figure. This equipment can display the signal in frequency domain. However, this type of spectrum analyzer can only accept one input at one time, so we may need to the target separatly and combine them together maybe use Photoshop. |
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|
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Besides, High-Frequency signal generator, DC power supplier are also needed in this case. |
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|
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## Test Steps |
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- Give a RF input without LO input and measure the output |
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- Give a LO input without RF input and measure the output |
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- Give both RF and LO input and measure the output |
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- Measure the range of RF frequency that it can work |
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- Measure the range of LO frequenct that it can work |
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|
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|
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----------------------------- |
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☛[Go to Log Book](/log/logbook) |
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Loading…
Reference in new issue